This invention relates to memory array fabrication.
Memory arrays are typically implemented on an integrated circuit device. Examples of these devices include Mask ROM, Flash, EPROM, DRAM, FeRAM, MRAM, and NROM.
Memory arrays generally include one or more memory array elements, which are structures that store data, typically in the form of one or more high or low values. A register of one or more flip-flops is one example of a memory array element.
In some instances, a memory array element is a memory cell. Memory cells of a memory array are typically arranged in a pattern. In one type of pattern, memory cells are arranged to form a word line. The distance between adjacent word lines, usually called the “pitch,” is usually uniform for a given memory array. In some instances, pitch can be measured on a space-to-space basis instead of on a line-to-line basis, where space refers to the area between adjacent lines.
Different memory arrays can have different pitches. A first memory array can have, for example, a first pitch that is less than a second pitch of a second memory array. For a given distance, the first memory array has more word lines than does the second memory array. Reducing the pitch of a memory array generally refers to a fabrication process in which more word lines are added to a particular area that already includes existing word lines.
Memory arrays are typically connected to peripheral circuitry, which are generally components on a memory chip that are not memory cells. Examples of peripheral circuitry include and are not limited to decoders and connections between word lines.